Characterization of deep levels in Si-MOS structure using ICTS measurement

Susumu Iwamoto, Haruhiko Yoshida, Seigo Kishino

Open source

DOI
10.1002/(sici)1520-6416(200003)130:4<76::aid-eej9>3.3.co;2-4
Published
2000-03
Container
Electrical Engineering in Japan
Publisher
Wiley
Open access
unknown

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BibTeX

@article{allodium:10.1002/-sici-1520-6416-200003-130:4-76::aid-eej9-3.3.co-2-4,
  title = {Characterization of deep levels in Si-MOS structure using ICTS measurement},
  author = {Susumu Iwamoto and Haruhiko Yoshida and Seigo Kishino},
  year = {2000},
  journal = {Electrical Engineering in Japan},
  doi = {10.1002/(sici)1520-6416(200003)130:4<76::aid-eej9>3.3.co;2-4},
  url = {https://doi.org/10.1002/(sici)1520-6416(200003)130:4<76::aid-eej9>3.3.co;2-4}
}

RIS

TY  - JOUR
TI  - Characterization of deep levels in Si-MOS structure using ICTS measurement
AU  - Susumu Iwamoto
AU  - Haruhiko Yoshida
AU  - Seigo Kishino
PY  - 2000
JO  - Electrical Engineering in Japan
DO  - 10.1002/(sici)1520-6416(200003)130:4<76::aid-eej9>3.3.co;2-4
UR  - https://doi.org/10.1002/(sici)1520-6416(200003)130:4<76::aid-eej9>3.3.co;2-4
ER  - 

APA

Iwamoto, S., Yoshida, H., & Kishino, S. (2000). Characterization of deep levels in Si-MOS structure using ICTS measurement. Electrical Engineering in Japan. https://doi.org/10.1002/(sici)1520-6416(200003)130:4<76::aid-eej9>3.3.co;2-4

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