Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology
- DOI
- 10.1007/978-3-031-36007-7_21
- Published
- 2023
- Container
- Not recorded
- Publisher
- Springer Nature Switzerland
- Open access
- yes
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Cite this work
BibTeX
@article{allodium:10.1007/978-3-031-36007-7_21,
title = {Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology},
author = {João Xavier and Pedro Barquinha and João Goes},
year = {2023},
doi = {10.1007/978-3-031-36007-7_21},
url = {https://doi.org/10.1007/978-3-031-36007-7_21}
}RIS
TY - JOUR TI - Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology AU - João Xavier AU - Pedro Barquinha AU - João Goes PY - 2023 DO - 10.1007/978-3-031-36007-7_21 UR - https://doi.org/10.1007/978-3-031-36007-7_21 ER -
APA
Xavier, J., Barquinha, P., & Goes, J. (2023). Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology. https://doi.org/10.1007/978-3-031-36007-7_21
Source records
- hal · retrieved 2026-09-25T06:07:35.968Z