Embedding the V-Detector Algorithm in FPGA
- DOI
- 10.1007/978-3-319-45378-1_5
- Published
- 2016
- Container
- Lecture Notes in Computer Science
- Publisher
- Springer International Publishing
- Open access
- unknown
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uncertain Score 64/100 under policy 1.0.0. This is a metadata assessment, not a judgment of the paper's conclusions.
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Cite this work
BibTeX
@article{allodium:10.1007/978-3-319-45378-1_5,
title = {Embedding the V-Detector Algorithm in FPGA},
author = {Maciej Brzozowski and Andrzej Chmielewski},
year = {2016},
journal = {Lecture Notes in Computer Science},
doi = {10.1007/978-3-319-45378-1_5},
url = {https://doi.org/10.1007/978-3-319-45378-1_5}
}RIS
TY - JOUR TI - Embedding the V-Detector Algorithm in FPGA AU - Maciej Brzozowski AU - Andrzej Chmielewski PY - 2016 JO - Lecture Notes in Computer Science DO - 10.1007/978-3-319-45378-1_5 UR - https://doi.org/10.1007/978-3-319-45378-1_5 ER -
APA
Brzozowski, M., & Chmielewski, A. (2016). Embedding the V-Detector Algorithm in FPGA. Lecture Notes in Computer Science. https://doi.org/10.1007/978-3-319-45378-1_5
Source records
- crossref · retrieved 2026-11-10T11:25:39.306Z