From nonlinear neuronal dynamics to AI-optimized VLSI hardware: multiplier-free FPGA implementation of memristive FN-HR coupled neural networks for intelligent systems

Wei Wu, Wensen Yu, Chaochao Wang, Mohammad Sh. Daoud, Abdulilah Mohammad Mayet, Yisu Ge, Xiaotian Pan, Guodao Zhang

Open source

DOI
10.1007/s11571-026-10476-6
Published
2026-06-08
Container
Cognitive Neurodynamics
Publisher
Springer Science and Business Media LLC
Open access
unknown

Credibility signals

uncertain Score 64/100 under policy 1.0.0. This is a metadata assessment, not a judgment of the paper's conclusions.

Show all credibility signals

Cite this work

BibTeX

@article{allodium:10.1007/s11571-026-10476-6,
  title = {From nonlinear neuronal dynamics to AI-optimized VLSI hardware: multiplier-free FPGA implementation of memristive FN-HR coupled neural networks for intelligent systems},
  author = {Wei Wu and Wensen Yu and Chaochao Wang and Mohammad Sh. Daoud and Abdulilah Mohammad Mayet and Yisu Ge and Xiaotian Pan and Guodao Zhang},
  year = {2026},
  journal = {Cognitive Neurodynamics},
  doi = {10.1007/s11571-026-10476-6},
  url = {https://doi.org/10.1007/s11571-026-10476-6}
}

RIS

TY  - JOUR
TI  - From nonlinear neuronal dynamics to AI-optimized VLSI hardware: multiplier-free FPGA implementation of memristive FN-HR coupled neural networks for intelligent systems
AU  - Wei Wu
AU  - Wensen Yu
AU  - Chaochao Wang
AU  - Mohammad Sh. Daoud
AU  - Abdulilah Mohammad Mayet
AU  - Yisu Ge
AU  - Xiaotian Pan
AU  - Guodao Zhang
PY  - 2026
JO  - Cognitive Neurodynamics
DO  - 10.1007/s11571-026-10476-6
UR  - https://doi.org/10.1007/s11571-026-10476-6
ER  - 

APA

Wu, W., Yu, W., Wang, C., Daoud, M. S., Mayet, A. M., Ge, Y., Pan, X., & Zhang, G. (2026). From nonlinear neuronal dynamics to AI-optimized VLSI hardware: multiplier-free FPGA implementation of memristive FN-HR coupled neural networks for intelligent systems. Cognitive Neurodynamics. https://doi.org/10.1007/s11571-026-10476-6

Source records