Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs

F.L. Kastensmidt, J. Tonfat, T. Both, P. Rech, G. Wirth, R. Reis, F. Bruguier, P. Benoit, L. Torres, C. Frost

Open source

DOI
10.1016/j.microrel.2014.07.100
Published
2014-09
Container
Microelectronics Reliability
Publisher
Elsevier BV
Open access
unknown

Credibility signals

uncertain Score 64/100 under policy 1.0.0. This is a metadata assessment, not a judgment of the paper's conclusions.

Show all credibility signals

Cite this work

BibTeX

@article{allodium:10.1016/j.microrel.2014.07.100,
  title = {Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs},
  author = {F.L. Kastensmidt and J. Tonfat and T. Both and P. Rech and G. Wirth and R. Reis and F. Bruguier and P. Benoit and L. Torres and C. Frost},
  year = {2014},
  journal = {Microelectronics Reliability},
  doi = {10.1016/j.microrel.2014.07.100},
  url = {https://doi.org/10.1016/j.microrel.2014.07.100}
}

RIS

TY  - JOUR
TI  - Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs
AU  - F.L. Kastensmidt
AU  - J. Tonfat
AU  - T. Both
AU  - P. Rech
AU  - G. Wirth
AU  - R. Reis
AU  - F. Bruguier
AU  - P. Benoit
AU  - L. Torres
AU  - C. Frost
PY  - 2014
JO  - Microelectronics Reliability
DO  - 10.1016/j.microrel.2014.07.100
UR  - https://doi.org/10.1016/j.microrel.2014.07.100
ER  - 

APA

Kastensmidt, F., Tonfat, J., Both, T., Rech, P., Wirth, G., Reis, R., Bruguier, F., Benoit, P., Torres, L., & Frost, C. (2014). Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs. Microelectronics Reliability. https://doi.org/10.1016/j.microrel.2014.07.100

Source records