Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs
- DOI
- 10.1016/j.microrel.2014.07.100
- Published
- 2014-09
- Container
- Microelectronics Reliability
- Publisher
- Elsevier BV
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1016/j.microrel.2014.07.100,
title = {Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs},
author = {F.L. Kastensmidt and J. Tonfat and T. Both and P. Rech and G. Wirth and R. Reis and F. Bruguier and P. Benoit and L. Torres and C. Frost},
year = {2014},
journal = {Microelectronics Reliability},
doi = {10.1016/j.microrel.2014.07.100},
url = {https://doi.org/10.1016/j.microrel.2014.07.100}
}RIS
TY - JOUR TI - Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs AU - F.L. Kastensmidt AU - J. Tonfat AU - T. Both AU - P. Rech AU - G. Wirth AU - R. Reis AU - F. Bruguier AU - P. Benoit AU - L. Torres AU - C. Frost PY - 2014 JO - Microelectronics Reliability DO - 10.1016/j.microrel.2014.07.100 UR - https://doi.org/10.1016/j.microrel.2014.07.100 ER -
APA
Kastensmidt, F., Tonfat, J., Both, T., Rech, P., Wirth, G., Reis, R., Bruguier, F., Benoit, P., Torres, L., & Frost, C. (2014). Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs. Microelectronics Reliability. https://doi.org/10.1016/j.microrel.2014.07.100
Source records
- crossref · retrieved 2026-09-26T05:57:11.094Z