Optimization of a MOS–IGBT–SCR ESD protection component in smart power SOI technology

H. Arbess, M. Bafleur, D. Trémouilles, M. Zerarka

Open source

DOI: 10.1016/j.microrel.2015.06.138
Published: 2015-08
Container: Microelectronics Reliability
Publisher: Elsevier BV
Open access: unknown

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Cite this work

BibTeX

@article{allodium:10.1016/j.microrel.2015.06.138,
  title = {Optimization of a MOS–IGBT–SCR ESD protection component in smart power SOI technology},
  author = {H. Arbess and M. Bafleur and D. Trémouilles and M. Zerarka},
  year = {2015},
  journal = {Microelectronics Reliability},
  doi = {10.1016/j.microrel.2015.06.138},
  url = {https://doi.org/10.1016/j.microrel.2015.06.138}
}

RIS

TY  - JOUR
TI  - Optimization of a MOS–IGBT–SCR ESD protection component in smart power SOI technology
AU  - H. Arbess
AU  - M. Bafleur
AU  - D. Trémouilles
AU  - M. Zerarka
PY  - 2015
JO  - Microelectronics Reliability
DO  - 10.1016/j.microrel.2015.06.138
UR  - https://doi.org/10.1016/j.microrel.2015.06.138
ER  -

APA

Arbess, H., Bafleur, M., Trémouilles, D., & Zerarka, M. (2015). Optimization of a MOS–IGBT–SCR ESD protection component in smart power SOI technology. Microelectronics Reliability. https://doi.org/10.1016/j.microrel.2015.06.138

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crossref · retrieved 2026-09-25T18:02:39.852Z