Eight-channel high-speed electrical impedance tomography device implemented on a programmable system on a chip.

Escobar FA, Rengifo CF, Mosquera VH

Open source

DOI: 10.1016/j.ohx.2025.e00667
Published: 2025 Sep
Container: HardwareX
Publisher: Not recorded
Open access: yes

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Cite this work

BibTeX

@article{allodium:10.1016/j.ohx.2025.e00667,
  title = {Eight-channel high-speed electrical impedance tomography device implemented on a programmable system on a chip.},
  author = {Escobar FA and Rengifo CF and Mosquera VH},
  year = {2025},
  journal = {HardwareX},
  doi = {10.1016/j.ohx.2025.e00667},
  url = {https://doi.org/10.1016/j.ohx.2025.e00667}
}

RIS

TY  - JOUR
TI  - Eight-channel high-speed electrical impedance tomography device implemented on a programmable system on a chip.
AU  - Escobar FA
AU  - Rengifo CF
AU  - Mosquera VH
PY  - 2025
JO  - HardwareX
DO  - 10.1016/j.ohx.2025.e00667
UR  - https://doi.org/10.1016/j.ohx.2025.e00667
ER  -

APA

FA, E., CF, R., & VH, M. (2025). Eight-channel high-speed electrical impedance tomography device implemented on a programmable system on a chip.. HardwareX. https://doi.org/10.1016/j.ohx.2025.e00667

Source records

pubmed · retrieved 2026-09-27T17:19:09.273Z
europe-pmc · retrieved 2026-09-27T17:19:09.284Z
doaj · retrieved 2026-09-27T17:19:09.276Z