Engineering Top Gate Stack for Wafer-Scale Integrated Circuit Fabrication Based on Two-Dimensional Semiconductors.

Ma J, Chen X, Wang X, Bian J, Tong L, Chen H, Guo X, Xia Y, Zhang X, Xu Z, He C, Qu J, Zhou P, Wu C, Wu X, Bao W

Open source

DOI
10.1021/acsami.1c22990
Published
2022 Mar 9
Container
ACS applied materials & interfaces
Publisher
Not recorded
Open access
unknown

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BibTeX

@article{allodium:10.1021/acsami.1c22990,
  title = {Engineering Top Gate Stack for Wafer-Scale Integrated Circuit Fabrication Based on Two-Dimensional Semiconductors.},
  author = {Ma J and Chen X and Wang X and Bian J and Tong L and Chen H and Guo X and Xia Y and Zhang X and Xu Z and He C and Qu J and Zhou P and Wu C and Wu X and Bao W},
  year = {2022},
  journal = {ACS applied materials \& interfaces},
  doi = {10.1021/acsami.1c22990},
  url = {https://doi.org/10.1021/acsami.1c22990}
}

RIS

TY  - JOUR
TI  - Engineering Top Gate Stack for Wafer-Scale Integrated Circuit Fabrication Based on Two-Dimensional Semiconductors.
AU  - Ma J
AU  - Chen X
AU  - Wang X
AU  - Bian J
AU  - Tong L
AU  - Chen H
AU  - Guo X
AU  - Xia Y
AU  - Zhang X
AU  - Xu Z
AU  - He C
AU  - Qu J
AU  - Zhou P
AU  - Wu C
AU  - Wu X
AU  - Bao W
PY  - 2022
JO  - ACS applied materials & interfaces
DO  - 10.1021/acsami.1c22990
UR  - https://doi.org/10.1021/acsami.1c22990
ER  - 

APA

J, M., X, C., X, W., J, B., L, T., H, C., X, G., Y, X., X, Z., Z, X., C, H., J, Q., P, Z., C, W., X, W., & W, B. (2022). Engineering Top Gate Stack for Wafer-Scale Integrated Circuit Fabrication Based on Two-Dimensional Semiconductors.. ACS applied materials & interfaces. https://doi.org/10.1021/acsami.1c22990

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