CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor.
- DOI
- 10.1038/s41467-023-41868-5
- Published
- 2023 Sep 28
- Container
- Nature communications
- Publisher
- Not recorded
- Open access
- yes
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Cite this work
BibTeX
@article{allodium:10.1038/s41467-023-41868-5,
title = {CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor.},
author = {Wang W and Li K and Lan J and Shen M and Wang Z and Feng X and Yu H and Chen K and Li J and Zhou F and Lin L and Zhang P and Li Y},
year = {2023},
journal = {Nature communications},
doi = {10.1038/s41467-023-41868-5},
url = {https://doi.org/10.1038/s41467-023-41868-5}
}RIS
TY - JOUR TI - CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor. AU - Wang W AU - Li K AU - Lan J AU - Shen M AU - Wang Z AU - Feng X AU - Yu H AU - Chen K AU - Li J AU - Zhou F AU - Lin L AU - Zhang P AU - Li Y PY - 2023 JO - Nature communications DO - 10.1038/s41467-023-41868-5 UR - https://doi.org/10.1038/s41467-023-41868-5 ER -
APA
W, W., K, L., J, L., M, S., Z, W., X, F., H, Y., K, C., J, L., F, Z., L, L., P, Z., & Y, L. (2023). CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor.. Nature communications. https://doi.org/10.1038/s41467-023-41868-5
Source records
- pubmed · retrieved 2026-09-26T04:01:46.955Z