Design and synthesis of reversible Vedic multiplier using cadence 180 nm technology for low-power high-speed applications.

Mageshwari N, Sakthivel P, Seetharaman R

Open source

DOI
10.1038/s41598-025-04002-7
Published
2025 May 28
Container
Scientific reports
Publisher
Not recorded
Open access
yes

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BibTeX

@article{allodium:10.1038/s41598-025-04002-7,
  title = {Design and synthesis of reversible Vedic multiplier using cadence 180 nm technology for low-power high-speed applications.},
  author = {Mageshwari N and Sakthivel P and Seetharaman R},
  year = {2025},
  journal = {Scientific reports},
  doi = {10.1038/s41598-025-04002-7},
  url = {https://doi.org/10.1038/s41598-025-04002-7}
}

RIS

TY  - JOUR
TI  - Design and synthesis of reversible Vedic multiplier using cadence 180 nm technology for low-power high-speed applications.
AU  - Mageshwari N
AU  - Sakthivel P
AU  - Seetharaman R
PY  - 2025
JO  - Scientific reports
DO  - 10.1038/s41598-025-04002-7
UR  - https://doi.org/10.1038/s41598-025-04002-7
ER  - 

APA

N, M., P, S., & R, S. (2025). Design and synthesis of reversible Vedic multiplier using cadence 180 nm technology for low-power high-speed applications.. Scientific reports. https://doi.org/10.1038/s41598-025-04002-7

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