SAT-inspired feature engineering with stacking ensemble learning for fault detection in digital logic circuits.

Thangaganesan Chandradevi S, Ramachandran D

Open source

DOI
10.1038/s41598-026-50142-9
Published
2026 May 4
Container
Scientific reports
Publisher
Not recorded
Open access
yes

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BibTeX

@article{allodium:10.1038/s41598-026-50142-9,
  title = {SAT-inspired feature engineering with stacking ensemble learning for fault detection in digital logic circuits.},
  author = {Thangaganesan Chandradevi S and Ramachandran D},
  year = {2026},
  journal = {Scientific reports},
  doi = {10.1038/s41598-026-50142-9},
  url = {https://doi.org/10.1038/s41598-026-50142-9}
}

RIS

TY  - JOUR
TI  - SAT-inspired feature engineering with stacking ensemble learning for fault detection in digital logic circuits.
AU  - Thangaganesan Chandradevi S
AU  - Ramachandran D
PY  - 2026
JO  - Scientific reports
DO  - 10.1038/s41598-026-50142-9
UR  - https://doi.org/10.1038/s41598-026-50142-9
ER  -

APA

S, T. C., & D, R. (2026). SAT-inspired feature engineering with stacking ensemble learning for fault detection in digital logic circuits.. Scientific reports. https://doi.org/10.1038/s41598-026-50142-9

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