Low-power design and implementation of an enhanced I2C bus controller using open lane: from RTL to GDSII

Gavaskar K, Arun S, Anbumani V, Sathya Narayanan Velmurugan, Mathankumar M

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DOI: 10.1038/s41598-026-53211-1
Published: 2026-05-16
Container: Scientific Reports
Publisher: Springer Science and Business Media LLC
Open access: unknown

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Cite this work

BibTeX

@article{allodium:10.1038/s41598-026-53211-1,
  title = {Low-power design and implementation of an enhanced I2C bus controller using open lane: from RTL to GDSII},
  author = {Gavaskar K and Arun S and Anbumani V and Sathya Narayanan Velmurugan and Mathankumar M},
  year = {2026},
  journal = {Scientific Reports},
  doi = {10.1038/s41598-026-53211-1},
  url = {https://doi.org/10.1038/s41598-026-53211-1}
}

RIS

TY  - JOUR
TI  - Low-power design and implementation of an enhanced I2C bus controller using open lane: from RTL to GDSII
AU  - Gavaskar K
AU  - Arun S
AU  - Anbumani V
AU  - Sathya Narayanan Velmurugan
AU  - Mathankumar M
PY  - 2026
JO  - Scientific Reports
DO  - 10.1038/s41598-026-53211-1
UR  - https://doi.org/10.1038/s41598-026-53211-1
ER  -

APA

K, G., S, A., V, A., Velmurugan, S. N., & M, M. (2026). Low-power design and implementation of an enhanced I2C bus controller using open lane: from RTL to GDSII. Scientific Reports. https://doi.org/10.1038/s41598-026-53211-1

Source records

crossref · retrieved 2026-11-09T22:17:25.791Z