Low-power design and implementation of an enhanced I2C bus controller using open lane: from RTL to GDSII.

K G, S A, V A, Velmurugan SN, M M

DOI: 10.1038/s41598-026-53211-1
Published: 2026 May 16
Container: Scientific reports
Publisher: Not recorded
Open access: yes

Credibility signals

limited evidence Score 45/100 under policy 1.0.0. This is a metadata assessment, not a judgment of the paper's conclusions.

Show all credibility signals

cautionDOI registered: No matching Crossref record was present in this response. Source: Crossref; license: CC0 metadata
cautionDOI resolves: No matching Crossref record was present in this response. Source: Crossref; license: CC0 metadata
not scoredDirectory of Open Access Journals: No matching DOAJ record was present in this response. No allow-list match; this is not evidence of low credibility. Source: DOAJ; license: CC0
not scoredMEDLINE indexed: Not checked or no result supplied; no credibility inference made. Source: No authority result supplied; license: Unknown
not scoredOpenAlex core source: Not checked or no result supplied; no credibility inference made. Source: No authority result supplied; license: Unknown
not scoredKnown publisher allow-list: Not checked or no result supplied; no credibility inference made. Source: No authority result supplied; license: Unknown
not scoredROR affiliation: Not checked or no result supplied; no credibility inference made. Source: No authority result supplied; license: Unknown
not scoredRetraction Watch retraction: No retraction notice matched this DOI in the deployed snapshot. No matching event found; coverage may be incomplete. Source: Retraction Watch; license: CC BY 4.0
not scoredRetraction Watch expression of concern: No expression of concern notice matched this DOI in the deployed snapshot. No matching event found; coverage may be incomplete. Source: Retraction Watch; license: CC BY 4.0
not scoredRetraction Watch correction: No correction notice matched this DOI in the deployed snapshot. No matching event found; coverage may be incomplete. Source: Retraction Watch; license: CC BY 4.0
not scoredRetraction Watch reinstatement: No reinstatement notice matched this DOI in the deployed snapshot. No matching event found; coverage may be incomplete. Source: Retraction Watch; license: CC BY 4.0
supportingOpen access status: Normalized open-access status: open. Source: Normalized work metadata; license: Caller-provided; provenance license not supplied to scorer
not scoredPublication license: Not checked or no result supplied; no credibility inference made. Source: No authority result supplied; license: Unknown
not scoredPublication version: A publication version was supplied but is not scored. Source: Normalized work metadata; license: Caller-provided; provenance license not supplied to scorer
cautionMetadata completeness: 5 of 6 scored descriptive metadata groups are present; missing fields increase uncertainty. Source: Normalized work metadata; license: Caller-provided; provenance license not supplied to scorer

Cite this work

BibTeX

@article{allodium:10.1038/s41598-026-53211-1,
  title = {Low-power design and implementation of an enhanced I2C bus controller using open lane: from RTL to GDSII.},
  author = {K G and S A and V A and Velmurugan SN and M M},
  year = {2026},
  journal = {Scientific reports},
  doi = {10.1038/s41598-026-53211-1},
  url = {https://doi.org/10.1038/s41598-026-53211-1}
}

RIS

TY  - JOUR
TI  - Low-power design and implementation of an enhanced I2C bus controller using open lane: from RTL to GDSII.
AU  - K G
AU  - S A
AU  - V A
AU  - Velmurugan SN
AU  - M M
PY  - 2026
JO  - Scientific reports
DO  - 10.1038/s41598-026-53211-1
UR  - https://doi.org/10.1038/s41598-026-53211-1
ER  -

APA

G, K., A, S., A, V., SN, V., & M, M. (2026). Low-power design and implementation of an enhanced I2C bus controller using open lane: from RTL to GDSII.. Scientific reports. https://doi.org/10.1038/s41598-026-53211-1

Source records

pubmed · retrieved 2026-09-25T17:57:03.985Z