Design and temperature assessment of analog/RF and linearity parameters on dual material gate junctionless FinFET at 7 nm technology node for nano scale applications.
- DOI
- 10.1038/s41598-026-53465-9
- Published
- 2026 Jun 11
- Container
- Scientific reports
- Publisher
- Not recorded
- Open access
- yes
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Cite this work
BibTeX
@article{allodium:10.1038/s41598-026-53465-9,
title = {Design and temperature assessment of analog/RF and linearity parameters on dual material gate junctionless FinFET at 7 nm technology node for nano scale applications.},
author = {Kusuma R},
year = {2026},
journal = {Scientific reports},
doi = {10.1038/s41598-026-53465-9},
url = {https://doi.org/10.1038/s41598-026-53465-9}
}RIS
TY - JOUR TI - Design and temperature assessment of analog/RF and linearity parameters on dual material gate junctionless FinFET at 7 nm technology node for nano scale applications. AU - Kusuma R PY - 2026 JO - Scientific reports DO - 10.1038/s41598-026-53465-9 UR - https://doi.org/10.1038/s41598-026-53465-9 ER -
APA
R, K. (2026). Design and temperature assessment of analog/RF and linearity parameters on dual material gate junctionless FinFET at 7 nm technology node for nano scale applications.. Scientific reports. https://doi.org/10.1038/s41598-026-53465-9
Source records
- pubmed · retrieved 2026-11-10T12:10:39.480Z