A Comparative Study on minimum skew Clock tree distribution algorithms for high-speed Digital Integrated Circuits

Dominic Mathew, S Sophia, Kiran Kumar Pasupuleti

DOI: 10.1088/1742-6596/1916/1/012125
Published: 2021-05-01
Container: Journal of Physics: Conference Series
Publisher: IOP Publishing
Open access: unknown

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Cite this work

BibTeX

@article{allodium:10.1088/1742-6596/1916/1/012125,
  title = {A Comparative Study on minimum skew Clock tree distribution algorithms for high-speed Digital Integrated Circuits},
  author = {Dominic Mathew and S Sophia and Kiran Kumar Pasupuleti},
  year = {2021},
  journal = {Journal of Physics: Conference Series},
  doi = {10.1088/1742-6596/1916/1/012125},
  url = {https://doi.org/10.1088/1742-6596/1916/1/012125}
}

RIS

TY  - JOUR
TI  - A Comparative Study on minimum skew Clock tree distribution algorithms for high-speed Digital Integrated Circuits
AU  - Dominic Mathew
AU  - S Sophia
AU  - Kiran Kumar Pasupuleti
PY  - 2021
JO  - Journal of Physics: Conference Series
DO  - 10.1088/1742-6596/1916/1/012125
UR  - https://doi.org/10.1088/1742-6596/1916/1/012125
ER  -

APA

Mathew, D., Sophia, S., & Pasupuleti, K. K. (2021). A Comparative Study on minimum skew Clock tree distribution algorithms for high-speed Digital Integrated Circuits. Journal of Physics: Conference Series. https://doi.org/10.1088/1742-6596/1916/1/012125

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crossref · retrieved 2026-09-26T11:55:51.748Z