A spiking neuron implemented in VLSI

P Stoliar, I Akita, O Schneegans, M Hioki, M J Rozenberg

Open source

DOI: 10.1088/2399-6528/ac4e2a
Published: 2022-02-01
Container: Journal of Physics Communications
Publisher: IOP Publishing
Open access: unknown

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Cite this work

BibTeX

@article{allodium:10.1088/2399-6528/ac4e2a,
  title = {A spiking neuron implemented in VLSI},
  author = {P Stoliar and I Akita and O Schneegans and M Hioki and M J Rozenberg},
  year = {2022},
  journal = {Journal of Physics Communications},
  doi = {10.1088/2399-6528/ac4e2a},
  url = {https://doi.org/10.1088/2399-6528/ac4e2a}
}

RIS

TY  - JOUR
TI  - A spiking neuron implemented in VLSI
AU  - P Stoliar
AU  - I Akita
AU  - O Schneegans
AU  - M Hioki
AU  - M J Rozenberg
PY  - 2022
JO  - Journal of Physics Communications
DO  - 10.1088/2399-6528/ac4e2a
UR  - https://doi.org/10.1088/2399-6528/ac4e2a
ER  -

APA

Stoliar, P., Akita, I., Schneegans, O., Hioki, M., & Rozenberg, M. J. (2022). A spiking neuron implemented in VLSI. Journal of Physics Communications. https://doi.org/10.1088/2399-6528/ac4e2a

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crossref · retrieved 2026-09-25T23:33:33.538Z