Implementation of micropipelines in enable/disable CMOS differential logic
- DOI
- 10.1109/92.386234
- Published
- 1995-06
- Container
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1109/92.386234,
title = {Implementation of micropipelines in enable/disable CMOS differential logic},
author = {Shih-Lien Lu},
year = {1995},
journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
doi = {10.1109/92.386234},
url = {https://doi.org/10.1109/92.386234}
}RIS
TY - JOUR TI - Implementation of micropipelines in enable/disable CMOS differential logic AU - Shih-Lien Lu PY - 1995 JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems DO - 10.1109/92.386234 UR - https://doi.org/10.1109/92.386234 ER -
APA
Lu, S. (1995). Implementation of micropipelines in enable/disable CMOS differential logic. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. https://doi.org/10.1109/92.386234
Source records
- crossref · retrieved 2026-09-26T10:50:34.031Z