An In-DRAM BIST for 16 Gb DDR4 DRAM in the 2nd 10-nm-Class DRAM Process

Jaewon Park, Jae Hoon Lee, Sang-Kil Park, Ki Chul Chun, Kyomin Sohn, Sungho Kang

Open source

DOI
10.1109/access.2021.3061349
Published
2021
Container
IEEE Access
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Open access
unknown

Credibility signals

uncertain Score 64/100 under policy 1.0.0. This is a metadata assessment, not a judgment of the paper's conclusions.

Show all credibility signals

Cite this work

BibTeX

@article{allodium:10.1109/access.2021.3061349,
  title = {An In-DRAM BIST for 16 Gb DDR4 DRAM in the 2nd 10-nm-Class DRAM Process},
  author = {Jaewon Park and Jae Hoon Lee and Sang-Kil Park and Ki Chul Chun and Kyomin Sohn and Sungho Kang},
  year = {2021},
  journal = {IEEE Access},
  doi = {10.1109/access.2021.3061349},
  url = {https://doi.org/10.1109/access.2021.3061349}
}

RIS

TY  - JOUR
TI  - An In-DRAM BIST for 16 Gb DDR4 DRAM in the 2nd 10-nm-Class DRAM Process
AU  - Jaewon Park
AU  - Jae Hoon Lee
AU  - Sang-Kil Park
AU  - Ki Chul Chun
AU  - Kyomin Sohn
AU  - Sungho Kang
PY  - 2021
JO  - IEEE Access
DO  - 10.1109/access.2021.3061349
UR  - https://doi.org/10.1109/access.2021.3061349
ER  - 

APA

Park, J., Lee, J. H., Park, S., Chun, K. C., Sohn, K., & Kang, S. (2021). An In-DRAM BIST for 16 Gb DDR4 DRAM in the 2nd 10-nm-Class DRAM Process. IEEE Access. https://doi.org/10.1109/access.2021.3061349

Source records