Efficient Hardware Architectures for Accelerating Deep Neural Networks: Survey
- DOI
- 10.1109/access.2022.3229767
- Published
- 2022
- Container
- IEEE Access
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1109/access.2022.3229767,
title = {Efficient Hardware Architectures for Accelerating Deep Neural Networks: Survey},
author = {Pudi Dhilleswararao and Srinivas Boppu and M. Sabarimalai Manikandan and Linga Reddy Cenkeramaddi},
year = {2022},
journal = {IEEE Access},
doi = {10.1109/access.2022.3229767},
url = {https://doi.org/10.1109/access.2022.3229767}
}RIS
TY - JOUR TI - Efficient Hardware Architectures for Accelerating Deep Neural Networks: Survey AU - Pudi Dhilleswararao AU - Srinivas Boppu AU - M. Sabarimalai Manikandan AU - Linga Reddy Cenkeramaddi PY - 2022 JO - IEEE Access DO - 10.1109/access.2022.3229767 UR - https://doi.org/10.1109/access.2022.3229767 ER -
APA
Dhilleswararao, P., Boppu, S., Manikandan, M. S., & Cenkeramaddi, L. R. (2022). Efficient Hardware Architectures for Accelerating Deep Neural Networks: Survey. IEEE Access. https://doi.org/10.1109/access.2022.3229767
Source records
- crossref · retrieved 2026-11-10T08:03:47.148Z