Temporal Lockstep: Low-Cost Resilient Design for Microcontroller-Class RISC-V Processors
- DOI
- 10.1109/access.2026.3676682
- Published
- 2026
- Container
- IEEE Access
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1109/access.2026.3676682,
title = {Temporal Lockstep: Low-Cost Resilient Design for Microcontroller-Class RISC-V Processors},
author = {Riccardo Tedeschi and Alessandro Nadalini and Yvan Tortorella and Filippo Grillotti and Fabio de Ambroggi and Elio Guidetti and Luca Benini and Davide Rossi},
year = {2026},
journal = {IEEE Access},
doi = {10.1109/access.2026.3676682},
url = {https://doi.org/10.1109/access.2026.3676682}
}RIS
TY - JOUR TI - Temporal Lockstep: Low-Cost Resilient Design for Microcontroller-Class RISC-V Processors AU - Riccardo Tedeschi AU - Alessandro Nadalini AU - Yvan Tortorella AU - Filippo Grillotti AU - Fabio de Ambroggi AU - Elio Guidetti AU - Luca Benini AU - Davide Rossi PY - 2026 JO - IEEE Access DO - 10.1109/access.2026.3676682 UR - https://doi.org/10.1109/access.2026.3676682 ER -
APA
Tedeschi, R., Nadalini, A., Tortorella, Y., Grillotti, F., Ambroggi, F. D., Guidetti, E., Benini, L., & Rossi, D. (2026). Temporal Lockstep: Low-Cost Resilient Design for Microcontroller-Class RISC-V Processors. IEEE Access. https://doi.org/10.1109/access.2026.3676682
Source records
- crossref · retrieved 2026-09-27T00:31:42.199Z