Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system
- DOI
- 10.1109/arith.1993.378092
- Published
- Not recorded
- Container
- Proceedings of IEEE 11th Symposium on Computer Arithmetic
- Publisher
- IEEE Comput. Soc. Press
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1109/arith.1993.378092,
title = {Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system},
author = {D. Etiemble and K. Navi},
journal = {Proceedings of IEEE 11th Symposium on Computer Arithmetic},
doi = {10.1109/arith.1993.378092},
url = {https://doi.org/10.1109/arith.1993.378092}
}RIS
TY - JOUR TI - Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system AU - D. Etiemble AU - K. Navi JO - Proceedings of IEEE 11th Symposium on Computer Arithmetic DO - 10.1109/arith.1993.378092 UR - https://doi.org/10.1109/arith.1993.378092 ER -
APA
Etiemble, D., & Navi, K. (n.d.). Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system. Proceedings of IEEE 11th Symposium on Computer Arithmetic. https://doi.org/10.1109/arith.1993.378092
Source records
- crossref · retrieved 2026-09-27T16:16:59.890Z