Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system

D. Etiemble, K. Navi

Open source

DOI
10.1109/arith.1993.378092
Published
Not recorded
Container
Proceedings of IEEE 11th Symposium on Computer Arithmetic
Publisher
IEEE Comput. Soc. Press
Open access
unknown

Credibility signals

uncertain Score 58/100 under policy 1.0.0. This is a metadata assessment, not a judgment of the paper's conclusions.

Show all credibility signals

Cite this work

BibTeX

@article{allodium:10.1109/arith.1993.378092,
  title = {Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system},
  author = {D. Etiemble and K. Navi},
  journal = {Proceedings of IEEE 11th Symposium on Computer Arithmetic},
  doi = {10.1109/arith.1993.378092},
  url = {https://doi.org/10.1109/arith.1993.378092}
}

RIS

TY  - JOUR
TI  - Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system
AU  - D. Etiemble
AU  - K. Navi
JO  - Proceedings of IEEE 11th Symposium on Computer Arithmetic
DO  - 10.1109/arith.1993.378092
UR  - https://doi.org/10.1109/arith.1993.378092
ER  - 

APA

Etiemble, D., & Navi, K. (n.d.). Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system. Proceedings of IEEE 11th Symposium on Computer Arithmetic. https://doi.org/10.1109/arith.1993.378092

Source records