Vertical Heterojunction Ge0.92Sn0.08/Ge Gate-All-Around Nanowire pMOSFETs
- DOI
- 10.1109/eurosoi-ulis45800.2019.9041910
- Published
- 2019-04
- Container
- 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)
- Publisher
- IEEE
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1109/eurosoi-ulis45800.2019.9041910,
title = {Vertical Heterojunction Ge0.92Sn0.08/Ge Gate-All-Around Nanowire pMOSFETs},
author = {Mingshan Liu and Konstantin Mertens and Nils Von Den Driesch and Thomas Grap and Stefan Trellenkamp and Jean-Michel Hartmann and Joachim Knoch and Dan Buca and Qing-Tai Zhao},
year = {2019},
journal = {2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)},
doi = {10.1109/eurosoi-ulis45800.2019.9041910},
url = {https://doi.org/10.1109/eurosoi-ulis45800.2019.9041910}
}RIS
TY - JOUR TI - Vertical Heterojunction Ge0.92Sn0.08/Ge Gate-All-Around Nanowire pMOSFETs AU - Mingshan Liu AU - Konstantin Mertens AU - Nils Von Den Driesch AU - Thomas Grap AU - Stefan Trellenkamp AU - Jean-Michel Hartmann AU - Joachim Knoch AU - Dan Buca AU - Qing-Tai Zhao PY - 2019 JO - 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) DO - 10.1109/eurosoi-ulis45800.2019.9041910 UR - https://doi.org/10.1109/eurosoi-ulis45800.2019.9041910 ER -
APA
Liu, M., Mertens, K., Driesch, N. V. D., Grap, T., Trellenkamp, S., Hartmann, J., Knoch, J., Buca, D., & Zhao, Q. (2019). Vertical Heterojunction Ge0.92Sn0.08/Ge Gate-All-Around Nanowire pMOSFETs. 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS). https://doi.org/10.1109/eurosoi-ulis45800.2019.9041910
Source records
- crossref · retrieved 2026-11-10T18:20:04.048Z