A Scalable 1024-Channel Ultra-Low-Power Spike Sorting Chip With Event-Driven Detection and Spatial Clustering

Arash Akhoundi, Pumiao Yan, Yawende Landbrug, Madeline Hays, Boris Murmann, E. J. Chichilnisky, Dante G. Muratore

Open source

DOI
10.1109/jssc.2025.3611139
Published
2025-11
Container
IEEE Journal of Solid-State Circuits
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Open access
unknown

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BibTeX

@article{allodium:10.1109/jssc.2025.3611139,
  title = {A Scalable 1024-Channel Ultra-Low-Power Spike Sorting Chip With Event-Driven Detection and Spatial Clustering},
  author = {Arash Akhoundi and Pumiao Yan and Yawende Landbrug and Madeline Hays and Boris Murmann and E. J. Chichilnisky and Dante G. Muratore},
  year = {2025},
  journal = {IEEE Journal of Solid-State Circuits},
  doi = {10.1109/jssc.2025.3611139},
  url = {https://doi.org/10.1109/jssc.2025.3611139}
}

RIS

TY  - JOUR
TI  - A Scalable 1024-Channel Ultra-Low-Power Spike Sorting Chip With Event-Driven Detection and Spatial Clustering
AU  - Arash Akhoundi
AU  - Pumiao Yan
AU  - Yawende Landbrug
AU  - Madeline Hays
AU  - Boris Murmann
AU  - E. J. Chichilnisky
AU  - Dante G. Muratore
PY  - 2025
JO  - IEEE Journal of Solid-State Circuits
DO  - 10.1109/jssc.2025.3611139
UR  - https://doi.org/10.1109/jssc.2025.3611139
ER  - 

APA

Akhoundi, A., Yan, P., Landbrug, Y., Hays, M., Murmann, B., Chichilnisky, E. J., & Muratore, D. G. (2025). A Scalable 1024-Channel Ultra-Low-Power Spike Sorting Chip With Event-Driven Detection and Spatial Clustering. IEEE Journal of Solid-State Circuits. https://doi.org/10.1109/jssc.2025.3611139

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