Design of a high-speed low-power multiport register file

Shenglong Li, Zhaolin Li, Fang Wang

Open source

DOI
10.1109/primeasia.2009.5397357
Published
2009-11
Container
2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia)
Publisher
IEEE
Open access
unknown

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BibTeX

@article{allodium:10.1109/primeasia.2009.5397357,
  title = {Design of a high-speed low-power multiport register file},
  author = {Shenglong Li and Zhaolin Li and Fang Wang},
  year = {2009},
  journal = {2009 Asia Pacific Conference on Postgraduate Research in Microelectronics \& Electronics (PrimeAsia)},
  doi = {10.1109/primeasia.2009.5397357},
  url = {https://doi.org/10.1109/primeasia.2009.5397357}
}

RIS

TY  - JOUR
TI  - Design of a high-speed low-power multiport register file
AU  - Shenglong Li
AU  - Zhaolin Li
AU  - Fang Wang
PY  - 2009
JO  - 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia)
DO  - 10.1109/primeasia.2009.5397357
UR  - https://doi.org/10.1109/primeasia.2009.5397357
ER  - 

APA

Li, S., Li, Z., & Wang, F. (2009). Design of a high-speed low-power multiport register file. 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia). https://doi.org/10.1109/primeasia.2009.5397357

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