Multi-FPGA Prototyping Board Issue : the FPGA I/O Bottleneck
- DOI
- 10.1109/samos.2014.6893213
- Published
- 2014
- Container
- Not recorded
- Publisher
- Not recorded
- Open access
- no
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Cite this work
BibTeX
@article{allodium:10.1109/samos.2014.6893213,
title = {Multi-FPGA Prototyping Board Issue : the FPGA I/O Bottleneck},
author = {Qingshan Tang and Matthieu Tuna and Habib Mehrez},
year = {2014},
doi = {10.1109/samos.2014.6893213},
url = {https://doi.org/10.1109/samos.2014.6893213}
}RIS
TY - JOUR TI - Multi-FPGA Prototyping Board Issue : the FPGA I/O Bottleneck AU - Qingshan Tang AU - Matthieu Tuna AU - Habib Mehrez PY - 2014 DO - 10.1109/samos.2014.6893213 UR - https://doi.org/10.1109/samos.2014.6893213 ER -
APA
Tang, Q., Tuna, M., & Mehrez, H. (2014). Multi-FPGA Prototyping Board Issue : the FPGA I/O Bottleneck. https://doi.org/10.1109/samos.2014.6893213
Source records
- hal · retrieved 2026-09-25T06:36:12.060Z