ANP-R: A 22nm 0.88pJ/SOP Asynchronous SNN-based Processor with Coarse-Grained Reconfigurable Architecture Enabling Multisensory On-chip Incremental Learning for Edge AI.

Cheng Z, Huo D, Zhang J, Wang Z, Chen H

Open source

DOI
10.1109/tbcas.2026.3708212
Published
2026 Jun 29
Container
IEEE transactions on biomedical circuits and systems
Publisher
Not recorded
Open access
unknown

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BibTeX

@article{allodium:10.1109/tbcas.2026.3708212,
  title = {ANP-R: A 22nm 0.88pJ/SOP Asynchronous SNN-based Processor with Coarse-Grained Reconfigurable Architecture Enabling Multisensory On-chip Incremental Learning for Edge AI.},
  author = {Cheng Z and Huo D and Zhang J and Wang Z and Chen H},
  year = {2026},
  journal = {IEEE transactions on biomedical circuits and systems},
  doi = {10.1109/tbcas.2026.3708212},
  url = {https://doi.org/10.1109/tbcas.2026.3708212}
}

RIS

TY  - JOUR
TI  - ANP-R: A 22nm 0.88pJ/SOP Asynchronous SNN-based Processor with Coarse-Grained Reconfigurable Architecture Enabling Multisensory On-chip Incremental Learning for Edge AI.
AU  - Cheng Z
AU  - Huo D
AU  - Zhang J
AU  - Wang Z
AU  - Chen H
PY  - 2026
JO  - IEEE transactions on biomedical circuits and systems
DO  - 10.1109/tbcas.2026.3708212
UR  - https://doi.org/10.1109/tbcas.2026.3708212
ER  - 

APA

Z, C., D, H., J, Z., Z, W., & H, C. (2026). ANP-R: A 22nm 0.88pJ/SOP Asynchronous SNN-based Processor with Coarse-Grained Reconfigurable Architecture Enabling Multisensory On-chip Incremental Learning for Edge AI.. IEEE transactions on biomedical circuits and systems. https://doi.org/10.1109/tbcas.2026.3708212

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