Statistical Timing Analysis and Criticality Computation for Circuits With Post-Silicon Clock Tuning Elements
- DOI
- 10.1109/tcad.2015.2432143
- Published
- 2015-11
- Container
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1109/tcad.2015.2432143,
title = {Statistical Timing Analysis and Criticality Computation for Circuits With Post-Silicon Clock Tuning Elements},
author = {Bing Li and Ulf Schlichtmann},
year = {2015},
journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
doi = {10.1109/tcad.2015.2432143},
url = {https://doi.org/10.1109/tcad.2015.2432143}
}RIS
TY - JOUR TI - Statistical Timing Analysis and Criticality Computation for Circuits With Post-Silicon Clock Tuning Elements AU - Bing Li AU - Ulf Schlichtmann PY - 2015 JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems DO - 10.1109/tcad.2015.2432143 UR - https://doi.org/10.1109/tcad.2015.2432143 ER -
APA
Li, B., & Schlichtmann, U. (2015). Statistical Timing Analysis and Criticality Computation for Circuits With Post-Silicon Clock Tuning Elements. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. https://doi.org/10.1109/tcad.2015.2432143
Source records
- crossref · retrieved 2026-11-10T11:41:44.859Z