Exploiting Shared-Memory to Steer Scalability of Fault Simulation Using Multicore Systems
- DOI
- 10.1109/tcad.2018.2855131
- Published
- 2019-08
- Container
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1109/tcad.2018.2855131,
title = {Exploiting Shared-Memory to Steer Scalability of Fault Simulation Using Multicore Systems},
author = {Stavros Hadjitheophanous and Stelios N. Neophytou and Maria K. Michael},
year = {2019},
journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
doi = {10.1109/tcad.2018.2855131},
url = {https://doi.org/10.1109/tcad.2018.2855131}
}RIS
TY - JOUR TI - Exploiting Shared-Memory to Steer Scalability of Fault Simulation Using Multicore Systems AU - Stavros Hadjitheophanous AU - Stelios N. Neophytou AU - Maria K. Michael PY - 2019 JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems DO - 10.1109/tcad.2018.2855131 UR - https://doi.org/10.1109/tcad.2018.2855131 ER -
APA
Hadjitheophanous, S., Neophytou, S. N., & Michael, M. K. (2019). Exploiting Shared-Memory to Steer Scalability of Fault Simulation Using Multicore Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. https://doi.org/10.1109/tcad.2018.2855131
Source records
- crossref · retrieved 2026-09-25T07:00:12.696Z