Wafer Scale Integration of CMOS Chips for Biomedical Applications via Self-Aligned Masking.
- DOI
- 10.1109/tcpmt.2011.2166395
- Published
- 2011 Dec 1
- Container
- IEEE transactions on components, packaging, and manufacturing technology
- Publisher
- Not recorded
- Open access
- yes
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Cite this work
BibTeX
@article{allodium:10.1109/tcpmt.2011.2166395,
title = {Wafer Scale Integration of CMOS Chips for Biomedical Applications via Self-Aligned Masking.},
author = {Uddin A and Milaninia K and Chen CH and Theogarajan L},
year = {2011},
journal = {IEEE transactions on components, packaging, and manufacturing technology},
doi = {10.1109/tcpmt.2011.2166395},
url = {https://doi.org/10.1109/tcpmt.2011.2166395}
}RIS
TY - JOUR TI - Wafer Scale Integration of CMOS Chips for Biomedical Applications via Self-Aligned Masking. AU - Uddin A AU - Milaninia K AU - Chen CH AU - Theogarajan L PY - 2011 JO - IEEE transactions on components, packaging, and manufacturing technology DO - 10.1109/tcpmt.2011.2166395 UR - https://doi.org/10.1109/tcpmt.2011.2166395 ER -
APA
A, U., K, M., CH, C., & L, T. (2011). Wafer Scale Integration of CMOS Chips for Biomedical Applications via Self-Aligned Masking.. IEEE transactions on components, packaging, and manufacturing technology. https://doi.org/10.1109/tcpmt.2011.2166395
Source records
- pubmed · retrieved 2026-09-26T08:53:12.447Z