All Digital Phase-Locked Loop Networks for Clock Generation and Distribution: Network Stability, Convergence and Performance
- DOI
- 10.1109/tcsi.2020.3032431
- Published
- 2021-01
- Container
- IEEE Transactions on Circuits and Systems I: Regular Papers
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1109/tcsi.2020.3032431,
title = {All Digital Phase-Locked Loop Networks for Clock Generation and Distribution: Network Stability, Convergence and Performance},
author = {Eugene Koskin and Pierre Bisiaux and Dimitri Galayko and Elena Blokhina},
year = {2021},
journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
doi = {10.1109/tcsi.2020.3032431},
url = {https://doi.org/10.1109/tcsi.2020.3032431}
}RIS
TY - JOUR TI - All Digital Phase-Locked Loop Networks for Clock Generation and Distribution: Network Stability, Convergence and Performance AU - Eugene Koskin AU - Pierre Bisiaux AU - Dimitri Galayko AU - Elena Blokhina PY - 2021 JO - IEEE Transactions on Circuits and Systems I: Regular Papers DO - 10.1109/tcsi.2020.3032431 UR - https://doi.org/10.1109/tcsi.2020.3032431 ER -
APA
Koskin, E., Bisiaux, P., Galayko, D., & Blokhina, E. (2021). All Digital Phase-Locked Loop Networks for Clock Generation and Distribution: Network Stability, Convergence and Performance. IEEE Transactions on Circuits and Systems I: Regular Papers. https://doi.org/10.1109/tcsi.2020.3032431
Source records
- crossref · retrieved 2026-11-10T20:14:32.750Z