Delayed Memory Unit: Modeling Temporal Dependency Through Delay Gate.
- DOI
- 10.1109/tnnls.2024.3490833
- Published
- 2025 Jun
- Container
- IEEE transactions on neural networks and learning systems
- Publisher
- Not recorded
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1109/tnnls.2024.3490833,
title = {Delayed Memory Unit: Modeling Temporal Dependency Through Delay Gate.},
author = {Sun P and Wu J and Zhang M and Devos P and Botteldooren D},
year = {2025},
journal = {IEEE transactions on neural networks and learning systems},
doi = {10.1109/tnnls.2024.3490833},
url = {https://doi.org/10.1109/tnnls.2024.3490833}
}RIS
TY - JOUR TI - Delayed Memory Unit: Modeling Temporal Dependency Through Delay Gate. AU - Sun P AU - Wu J AU - Zhang M AU - Devos P AU - Botteldooren D PY - 2025 JO - IEEE transactions on neural networks and learning systems DO - 10.1109/tnnls.2024.3490833 UR - https://doi.org/10.1109/tnnls.2024.3490833 ER -
APA
P, S., J, W., M, Z., P, D., & D, B. (2025). Delayed Memory Unit: Modeling Temporal Dependency Through Delay Gate.. IEEE transactions on neural networks and learning systems. https://doi.org/10.1109/tnnls.2024.3490833
Source records
- pubmed · retrieved 2026-09-25T11:29:43.384Z