A novel reconfigurable architecture of a DSP processor for efficient mapping of DSP functions using field programmable DSP arrays

Amitabha Sinha, Mitrava Sarkar, Soumojit Acharyya, Suranjan Chakraborty

Open source

DOI
10.1145/2490302.2490304
Published
2013-05-29
Container
ACM SIGARCH Computer Architecture News
Publisher
Association for Computing Machinery (ACM)
Open access
unknown

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BibTeX

@article{allodium:10.1145/2490302.2490304,
  title = {A novel reconfigurable architecture of a DSP processor for efficient mapping of DSP functions using field programmable DSP arrays},
  author = {Amitabha Sinha and Mitrava Sarkar and Soumojit Acharyya and Suranjan Chakraborty},
  year = {2013},
  journal = {ACM SIGARCH Computer Architecture News},
  doi = {10.1145/2490302.2490304},
  url = {https://doi.org/10.1145/2490302.2490304}
}

RIS

TY  - JOUR
TI  - A novel reconfigurable architecture of a DSP processor for efficient mapping of DSP functions using field programmable DSP arrays
AU  - Amitabha Sinha
AU  - Mitrava Sarkar
AU  - Soumojit Acharyya
AU  - Suranjan Chakraborty
PY  - 2013
JO  - ACM SIGARCH Computer Architecture News
DO  - 10.1145/2490302.2490304
UR  - https://doi.org/10.1145/2490302.2490304
ER  - 

APA

Sinha, A., Sarkar, M., Acharyya, S., & Chakraborty, S. (2013). A novel reconfigurable architecture of a DSP processor for efficient mapping of DSP functions using field programmable DSP arrays. ACM SIGARCH Computer Architecture News. https://doi.org/10.1145/2490302.2490304

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