Presentation of a fault tolerance algorithm for design of quantum-dot cellular automata circuits

Seyed Mehdi Dadgar, Razieh Farazkish, Amir Sahafi

Open source

DOI: 10.11591/ijece.v12i5.pp4722-4733
Published: 2022-10-01
Container: International Journal of Electrical and Computer Engineering (IJECE)
Publisher: Institute of Advanced Engineering and Science
Open access: unknown

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Cite this work

BibTeX

@article{allodium:10.11591/ijece.v12i5.pp4722-4733,
  title = {Presentation of a fault tolerance algorithm for design of quantum-dot cellular automata circuits},
  author = {Seyed Mehdi Dadgar and Razieh Farazkish and Amir Sahafi},
  year = {2022},
  journal = {International Journal of Electrical and Computer Engineering (IJECE)},
  doi = {10.11591/ijece.v12i5.pp4722-4733},
  url = {https://doi.org/10.11591/ijece.v12i5.pp4722-4733}
}

RIS

TY  - JOUR
TI  - Presentation of a fault tolerance algorithm for design of quantum-dot cellular automata circuits
AU  - Seyed Mehdi Dadgar
AU  - Razieh Farazkish
AU  - Amir Sahafi
PY  - 2022
JO  - International Journal of Electrical and Computer Engineering (IJECE)
DO  - 10.11591/ijece.v12i5.pp4722-4733
UR  - https://doi.org/10.11591/ijece.v12i5.pp4722-4733
ER  -

APA

Dadgar, S. M., Farazkish, R., & Sahafi, A. (2022). Presentation of a fault tolerance algorithm for design of quantum-dot cellular automata circuits. International Journal of Electrical and Computer Engineering (IJECE). https://doi.org/10.11591/ijece.v12i5.pp4722-4733

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crossref · retrieved 2026-09-26T10:10:29.853Z