Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness
- DOI
- 10.1186/s11671-020-03360-7
- Published
- 2020-06-15
- Container
- Nanoscale Research Letters
- Publisher
- Springer Science and Business Media LLC
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1186/s11671-020-03360-7,
title = {Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness},
author = {Maolin Zhang and Yufeng Guo and Jun Zhang and Jiafei Yao and Jing Chen},
year = {2020},
journal = {Nanoscale Research Letters},
doi = {10.1186/s11671-020-03360-7},
url = {https://doi.org/10.1186/s11671-020-03360-7}
}RIS
TY - JOUR TI - Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness AU - Maolin Zhang AU - Yufeng Guo AU - Jun Zhang AU - Jiafei Yao AU - Jing Chen PY - 2020 JO - Nanoscale Research Letters DO - 10.1186/s11671-020-03360-7 UR - https://doi.org/10.1186/s11671-020-03360-7 ER -
APA
Zhang, M., Guo, Y., Zhang, J., Yao, J., & Chen, J. (2020). Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness. Nanoscale Research Letters. https://doi.org/10.1186/s11671-020-03360-7
Source records
- crossref · retrieved 2026-11-08T04:46:40.712Z