Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process

Ruibo Chen, Hongxia Liu, Wenqiang Song, Feibo Du, Hao Zhang, Jikai Zhang, Zhiwei Liu

Open source

DOI
10.1186/s11671-020-03437-3
Published
2020-11-11
Container
Nanoscale Research Letters
Publisher
Springer Science and Business Media LLC
Open access
unknown

Credibility signals

uncertain Score 64/100 under policy 1.0.0. This is a metadata assessment, not a judgment of the paper's conclusions.

Show all credibility signals

Cite this work

BibTeX

@article{allodium:10.1186/s11671-020-03437-3,
  title = {Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process},
  author = {Ruibo Chen and Hongxia Liu and Wenqiang Song and Feibo Du and Hao Zhang and Jikai Zhang and Zhiwei Liu},
  year = {2020},
  journal = {Nanoscale Research Letters},
  doi = {10.1186/s11671-020-03437-3},
  url = {https://doi.org/10.1186/s11671-020-03437-3}
}

RIS

TY  - JOUR
TI  - Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process
AU  - Ruibo Chen
AU  - Hongxia Liu
AU  - Wenqiang Song
AU  - Feibo Du
AU  - Hao Zhang
AU  - Jikai Zhang
AU  - Zhiwei Liu
PY  - 2020
JO  - Nanoscale Research Letters
DO  - 10.1186/s11671-020-03437-3
UR  - https://doi.org/10.1186/s11671-020-03437-3
ER  - 

APA

Chen, R., Liu, H., Song, W., Du, F., Zhang, H., Zhang, J., & Liu, Z. (2020). Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process. Nanoscale Research Letters. https://doi.org/10.1186/s11671-020-03437-3

Source records