Design and simulation of a CNTFET based approximate full adder for low power nanoelectronic and image processing applications.

Karimi Forood AM, Narouei M, Basha SJ, Haq SU, Sharma T, Bansal D

DOI: 10.1186/s11671-026-04814-0
Published: 2026 Aug 10
Container: Discover nano
Publisher: Not recorded
Open access: yes

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Cite this work

BibTeX

@article{allodium:10.1186/s11671-026-04814-0,
  title = {Design and simulation of a CNTFET based approximate full adder for low power nanoelectronic and image processing applications.},
  author = {Karimi Forood AM and Narouei M and Basha SJ and Haq SU and Sharma T and Bansal D},
  year = {2026},
  journal = {Discover nano},
  doi = {10.1186/s11671-026-04814-0},
  url = {https://doi.org/10.1186/s11671-026-04814-0}
}

RIS

TY  - JOUR
TI  - Design and simulation of a CNTFET based approximate full adder for low power nanoelectronic and image processing applications.
AU  - Karimi Forood AM
AU  - Narouei M
AU  - Basha SJ
AU  - Haq SU
AU  - Sharma T
AU  - Bansal D
PY  - 2026
JO  - Discover nano
DO  - 10.1186/s11671-026-04814-0
UR  - https://doi.org/10.1186/s11671-026-04814-0
ER  -

APA

AM, K. F., M, N., SJ, B., SU, H., T, S., & D, B. (2026). Design and simulation of a CNTFET based approximate full adder for low power nanoelectronic and image processing applications.. Discover nano. https://doi.org/10.1186/s11671-026-04814-0

Source records

pubmed · retrieved 2026-09-25T21:48:01.977Z