Implementation of distributed arithmetic-based symmetrical 2-D block finite impulse response filter architectures

Pratyusha Chowdari Ch, J.B. Seventline

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DOI: 10.12688/f1000research.126067.1
Published: 2023-09-21
Container: F1000Research
Publisher: F1000 Research Ltd
Open access: unknown

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Cite this work

BibTeX

@article{allodium:10.12688/f1000research.126067.1,
  title = {Implementation of distributed arithmetic-based symmetrical 2-D block finite impulse response filter architectures},
  author = {Pratyusha Chowdari Ch and J.B. Seventline},
  year = {2023},
  journal = {F1000Research},
  doi = {10.12688/f1000research.126067.1},
  url = {https://doi.org/10.12688/f1000research.126067.1}
}

RIS

TY  - JOUR
TI  - Implementation of distributed arithmetic-based symmetrical 2-D block finite impulse response filter architectures
AU  - Pratyusha Chowdari Ch
AU  - J.B. Seventline
PY  - 2023
JO  - F1000Research
DO  - 10.12688/f1000research.126067.1
UR  - https://doi.org/10.12688/f1000research.126067.1
ER  -

APA

Ch, P. C., & Seventline, J. (2023). Implementation of distributed arithmetic-based symmetrical 2-D block finite impulse response filter architectures. F1000Research. https://doi.org/10.12688/f1000research.126067.1

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crossref · retrieved 2026-09-25T13:47:33.018Z