Topology Design of Extended Torus and Ring for Low Latency Network-on-Chip Architecture

Ng Yen Phing, M. N. Mohd Warip, Phaklen Ehkan, F. W. Zulkefli, R. Badlishah Ahmad

Open source

DOI
10.12928/telkomnika.v15i2.6134
Published
2017-03-01
Container
TELKOMNIKA (Telecommunication Computing Electronics and Control)
Publisher
Universitas Ahmad Dahlan
Open access
unknown

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BibTeX

@article{allodium:10.12928/telkomnika.v15i2.6134,
  title = {Topology Design of Extended Torus and Ring for Low Latency Network-on-Chip Architecture},
  author = {Ng Yen Phing and M. N. Mohd Warip and Phaklen Ehkan and F. W. Zulkefli and R. Badlishah Ahmad},
  year = {2017},
  journal = {TELKOMNIKA (Telecommunication Computing Electronics and Control)},
  doi = {10.12928/telkomnika.v15i2.6134},
  url = {https://doi.org/10.12928/telkomnika.v15i2.6134}
}

RIS

TY  - JOUR
TI  - Topology Design of Extended Torus and Ring for Low Latency Network-on-Chip Architecture
AU  - Ng Yen Phing
AU  - M. N. Mohd Warip
AU  - Phaklen Ehkan
AU  - F. W. Zulkefli
AU  - R. Badlishah Ahmad
PY  - 2017
JO  - TELKOMNIKA (Telecommunication Computing Electronics and Control)
DO  - 10.12928/telkomnika.v15i2.6134
UR  - https://doi.org/10.12928/telkomnika.v15i2.6134
ER  - 

APA

Phing, N. Y., Warip, M. N. M., Ehkan, P., Zulkefli, F. W., & Ahmad, R. B. (2017). Topology Design of Extended Torus and Ring for Low Latency Network-on-Chip Architecture. TELKOMNIKA (Telecommunication Computing Electronics and Control). https://doi.org/10.12928/telkomnika.v15i2.6134

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