Real-time FPGA prototyping of a 15GBaud SP-16QAM coherent optical receiver with optimal interpolating for clock recovery and equalization.
- DOI
- 10.1364/oe.463512
- Published
- 2022 Jul 18
- Container
- Optics express
- Publisher
- Not recorded
- Open access
- unknown
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Cite this work
BibTeX
@article{allodium:10.1364/oe.463512,
title = {Real-time FPGA prototyping of a 15GBaud SP-16QAM coherent optical receiver with optimal interpolating for clock recovery and equalization.},
author = {Song J and Li Y and Qiu J and Zuo Y and Li W and Hong X and Guo H and Wu J},
year = {2022},
journal = {Optics express},
doi = {10.1364/oe.463512},
url = {https://doi.org/10.1364/oe.463512}
}RIS
TY - JOUR TI - Real-time FPGA prototyping of a 15GBaud SP-16QAM coherent optical receiver with optimal interpolating for clock recovery and equalization. AU - Song J AU - Li Y AU - Qiu J AU - Zuo Y AU - Li W AU - Hong X AU - Guo H AU - Wu J PY - 2022 JO - Optics express DO - 10.1364/oe.463512 UR - https://doi.org/10.1364/oe.463512 ER -
APA
J, S., Y, L., J, Q., Y, Z., W, L., X, H., H, G., & J, W. (2022). Real-time FPGA prototyping of a 15GBaud SP-16QAM coherent optical receiver with optimal interpolating for clock recovery and equalization.. Optics express. https://doi.org/10.1364/oe.463512
Source records
- pubmed · retrieved 2026-09-25T10:08:57.515Z