Pipelined and conflict-free number theoretic transform accelerator for CRYSTALS-Kyber on FPGA.

Waris A, Aziz A, Khan BM

DOI: 10.1371/journal.pone.0333301
Published: 2025
Container: PloS one
Publisher: Not recorded
Open access: yes

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Cite this work

BibTeX

@article{allodium:10.1371/journal.pone.0333301,
  title = {Pipelined and conflict-free number theoretic transform accelerator for CRYSTALS-Kyber on FPGA.},
  author = {Waris A and Aziz A and Khan BM},
  year = {2025},
  journal = {PloS one},
  doi = {10.1371/journal.pone.0333301},
  url = {https://doi.org/10.1371/journal.pone.0333301}
}

RIS

TY  - JOUR
TI  - Pipelined and conflict-free number theoretic transform accelerator for CRYSTALS-Kyber on FPGA.
AU  - Waris A
AU  - Aziz A
AU  - Khan BM
PY  - 2025
JO  - PloS one
DO  - 10.1371/journal.pone.0333301
UR  - https://doi.org/10.1371/journal.pone.0333301
ER  -

APA

A, W., A, A., & BM, K. (2025). Pipelined and conflict-free number theoretic transform accelerator for CRYSTALS-Kyber on FPGA.. PloS one. https://doi.org/10.1371/journal.pone.0333301

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pubmed · retrieved 2026-09-25T21:16:05.500Z