Design of power efficient, high-speed 4-bit comparator in UMC 180 nm technology
- DOI
- 10.14456/easr.2021.5
- Published
- 1
- Container
- Engineering and Applied Science Research
- Publisher
- Faculty of Engineering, Khon Kaen University
- Open access
- no
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Cite this work
BibTeX
@article{allodium:10.14456/easr.2021.5,
title = {Design of power efficient, high-speed 4-bit comparator in UMC 180 nm technology},
author = {Sudheer Raja Venishetty and Chidra, Anil Kumar},
year = {2021},
journal = {Engineering and Applied Science Research},
doi = {10.14456/easr.2021.5},
url = {https://doi.org/10.14456/easr.2021.5}
}RIS
TY - JOUR TI - Design of power efficient, high-speed 4-bit comparator in UMC 180 nm technology AU - Sudheer Raja Venishetty AU - Chidra, Anil Kumar PY - 2021 JO - Engineering and Applied Science Research DO - 10.14456/easr.2021.5 UR - https://doi.org/10.14456/easr.2021.5 ER -
APA
Venishetty, S. R., & Kumar, C. A. (2021). Design of power efficient, high-speed 4-bit comparator in UMC 180 nm technology. Engineering and Applied Science Research. https://doi.org/10.14456/easr.2021.5