Design of data storage and transmission system for chip loading test

Liu Haichao, Zou Jiwei, Zhang Wei, Fang Sichao

Open source

DOI: 10.16157/j.issn.0258-7998.256427
Published: 9
Container: Dianzi Jishu Yingyong
Publisher: Not recorded
Open access: yes

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Cite this work

BibTeX

@article{allodium:10.16157/j.issn.0258-7998.256427,
  title = {Design of data storage and transmission system for chip loading test},
  author = {Liu Haichao and Zou Jiwei and Zhang Wei and Fang Sichao},
  year = {2025},
  journal = {Dianzi Jishu Yingyong},
  doi = {10.16157/j.issn.0258-7998.256427},
  url = {https://doi.org/10.16157/j.issn.0258-7998.256427}
}

RIS

TY  - JOUR
TI  - Design of data storage and transmission system for chip loading test
AU  - Liu Haichao
AU  - Zou Jiwei
AU  - Zhang Wei
AU  - Fang Sichao
PY  - 2025
JO  - Dianzi Jishu Yingyong
DO  - 10.16157/j.issn.0258-7998.256427
UR  - https://doi.org/10.16157/j.issn.0258-7998.256427
ER  -

APA

Haichao, L., Jiwei, Z., Wei, Z., & Sichao, F. (2025). Design of data storage and transmission system for chip loading test. Dianzi Jishu Yingyong. https://doi.org/10.16157/j.issn.0258-7998.256427

Source records

doaj · retrieved 2026-11-10T15:11:30.644Z