An Open-Hardware ML-KEM Polynomial Ring Accelerator on Chipyard RISC-V SoC: System-Level Integration and Evaluation

Yi-Chang Tsai, Yu-Han Lin, Wen-Jyi Hwang

Open source

DOI
10.20944/preprints202605.1405.v1
Published
2026-05-21
Container
Not recorded
Publisher
MDPI AG
Open access
unknown

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BibTeX

@article{allodium:10.20944/preprints202605.1405.v1,
  title = {An Open-Hardware ML-KEM Polynomial Ring Accelerator on Chipyard RISC-V SoC: System-Level Integration and Evaluation},
  author = {Yi-Chang Tsai and Yu-Han Lin and Wen-Jyi Hwang},
  year = {2026},
  doi = {10.20944/preprints202605.1405.v1},
  url = {https://doi.org/10.20944/preprints202605.1405.v1}
}

RIS

TY  - JOUR
TI  - An Open-Hardware ML-KEM Polynomial Ring Accelerator on Chipyard RISC-V SoC: System-Level Integration and Evaluation
AU  - Yi-Chang Tsai
AU  - Yu-Han Lin
AU  - Wen-Jyi Hwang
PY  - 2026
DO  - 10.20944/preprints202605.1405.v1
UR  - https://doi.org/10.20944/preprints202605.1405.v1
ER  - 

APA

Tsai, Y., Lin, Y., & Hwang, W. (2026). An Open-Hardware ML-KEM Polynomial Ring Accelerator on Chipyard RISC-V SoC: System-Level Integration and Evaluation. https://doi.org/10.20944/preprints202605.1405.v1

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