CardioNeural-SoC: An Indigenous RISC-V-Based Mixed-Signal System- on-Chip for Multi-Modal Cardiac and Neurological Monitoring — Architecture, RTL Verification, and Pre-Silicon Synthesis Results

N. J.R. M, R. Vishwajith, M. Sreelakshmi

Open source

DOI
10.21203/rs.3.rs-10838876/v1
Published
2026-10-11
Container
Not recorded
Publisher
Springer Science and Business Media LLC
Open access
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BibTeX

@article{allodium:10.21203/rs.3.rs-10838876/v1,
  title = {CardioNeural-SoC: An Indigenous RISC-V-Based Mixed-Signal System- on-Chip for Multi-Modal Cardiac and Neurological Monitoring — Architecture, RTL Verification, and Pre-Silicon Synthesis Results},
  author = {N. J.R. M and R. Vishwajith and M. Sreelakshmi},
  year = {2026},
  doi = {10.21203/rs.3.rs-10838876/v1},
  url = {https://doi.org/10.21203/rs.3.rs-10838876/v1}
}

RIS

TY  - JOUR
TI  - CardioNeural-SoC: An Indigenous RISC-V-Based Mixed-Signal System- on-Chip for Multi-Modal Cardiac and Neurological Monitoring — Architecture, RTL Verification, and Pre-Silicon Synthesis Results
AU  - N. J.R. M
AU  - R. Vishwajith
AU  - M. Sreelakshmi
PY  - 2026
DO  - 10.21203/rs.3.rs-10838876/v1
UR  - https://doi.org/10.21203/rs.3.rs-10838876/v1
ER  - 

APA

M, N. J., Vishwajith, R., & Sreelakshmi, M. (2026). CardioNeural-SoC: An Indigenous RISC-V-Based Mixed-Signal System- on-Chip for Multi-Modal Cardiac and Neurological Monitoring — Architecture, RTL Verification, and Pre-Silicon Synthesis Results. https://doi.org/10.21203/rs.3.rs-10838876/v1

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