Modular FPGA Design for Montgomery Multiplication Using MATLAB HDL Coder

Elsayed G.

DOI: 10.21203/rs.3.rs-8492006/v1
Published: 2026-01-28
Container: Not recorded
Publisher: Not recorded
Open access: no

Credibility signals

limited evidence Score 39/100 under policy 1.0.0. This is a metadata assessment, not a judgment of the paper's conclusions.

Show all credibility signals

cautionDOI registered: No matching Crossref record was present in this response. Source: Crossref; license: CC0 metadata
cautionDOI resolves: No matching Crossref record was present in this response. Source: Crossref; license: CC0 metadata
not scoredDirectory of Open Access Journals: No matching DOAJ record was present in this response. No allow-list match; this is not evidence of low credibility. Source: DOAJ; license: CC0
not scoredMEDLINE indexed: Not checked or no result supplied; no credibility inference made. Source: No authority result supplied; license: Unknown
not scoredOpenAlex core source: Not checked or no result supplied; no credibility inference made. Source: No authority result supplied; license: Unknown
not scoredKnown publisher allow-list: Not checked or no result supplied; no credibility inference made. Source: No authority result supplied; license: Unknown
not scoredROR affiliation: Not checked or no result supplied; no credibility inference made. Source: No authority result supplied; license: Unknown
not scoredRetraction Watch retraction: No retraction notice matched this DOI in the deployed snapshot. No matching event found; coverage may be incomplete. Source: Retraction Watch; license: CC BY 4.0
not scoredRetraction Watch expression of concern: No expression of concern notice matched this DOI in the deployed snapshot. No matching event found; coverage may be incomplete. Source: Retraction Watch; license: CC BY 4.0
not scoredRetraction Watch correction: No correction notice matched this DOI in the deployed snapshot. No matching event found; coverage may be incomplete. Source: Retraction Watch; license: CC BY 4.0
not scoredRetraction Watch reinstatement: No reinstatement notice matched this DOI in the deployed snapshot. No matching event found; coverage may be incomplete. Source: Retraction Watch; license: CC BY 4.0
not scoredOpen access status: Not checked or no result supplied; no credibility inference made. Source: No authority result supplied; license: Unknown
not scoredPublication license: Not checked or no result supplied; no credibility inference made. Source: No authority result supplied; license: Unknown
cautionPublication version: Identified as a preprint; peer review and later versions may change the record. Source: Normalized work metadata; license: Caller-provided; provenance license not supplied to scorer
cautionMetadata completeness: 5 of 6 scored descriptive metadata groups are present; missing fields increase uncertainty. Source: Normalized work metadata; license: Caller-provided; provenance license not supplied to scorer

Cite this work

BibTeX

@article{allodium:10.21203/rs.3.rs-8492006/v1,
  title = {Modular FPGA Design for Montgomery Multiplication Using MATLAB HDL Coder},
  author = {Elsayed G.},
  year = {2026},
  doi = {10.21203/rs.3.rs-8492006/v1},
  url = {https://doi.org/10.21203/rs.3.rs-8492006/v1}
}

RIS

TY  - JOUR
TI  - Modular FPGA Design for Montgomery Multiplication Using MATLAB HDL Coder
AU  - Elsayed G.
PY  - 2026
DO  - 10.21203/rs.3.rs-8492006/v1
UR  - https://doi.org/10.21203/rs.3.rs-8492006/v1
ER  -

APA

G., E. (2026). Modular FPGA Design for Montgomery Multiplication Using MATLAB HDL Coder. https://doi.org/10.21203/rs.3.rs-8492006/v1

Source records

europe-pmc · retrieved 2026-09-25T21:46:44.247Z