New March Elements for Address Decoder Open and Resistive Open Fault Detection in SRAM Memories
- DOI
- 10.29292/jics.v3i1.276
- Published
- 2008-03
- Container
- Journal of Integrated Circuits and Systems
- Publisher
- Not recorded
- Open access
- yes
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Cite this work
BibTeX
@article{allodium:10.29292/jics.v3i1.276,
title = {New March Elements for Address Decoder Open and Resistive Open Fault Detection in SRAM Memories},
author = {Luigi Dilillo and Patrick Girard and Serge Pravossoudovitch and Arnaud Virazel and Simone Borri and Magali Bastian Hage-Hassan},
year = {2008},
journal = {Journal of Integrated Circuits and Systems},
doi = {10.29292/jics.v3i1.276},
url = {https://doi.org/10.29292/jics.v3i1.276}
}RIS
TY - JOUR TI - New March Elements for Address Decoder Open and Resistive Open Fault Detection in SRAM Memories AU - Luigi Dilillo AU - Patrick Girard AU - Serge Pravossoudovitch AU - Arnaud Virazel AU - Simone Borri AU - Magali Bastian Hage-Hassan PY - 2008 JO - Journal of Integrated Circuits and Systems DO - 10.29292/jics.v3i1.276 UR - https://doi.org/10.29292/jics.v3i1.276 ER -
APA
Dilillo, L., Girard, P., Pravossoudovitch, S., Virazel, A., Borri, S., & Hage-Hassan, M. B. (2008). New March Elements for Address Decoder Open and Resistive Open Fault Detection in SRAM Memories. Journal of Integrated Circuits and Systems. https://doi.org/10.29292/jics.v3i1.276
Source records
- hal · retrieved 2026-09-25T21:43:40.145Z