Hardware-Efficient Stochastic Binary CNN Architectures for Near-Sensor Computing.

Parmar V, Penkovsky B, Querlioz D, Suri M

DOI: 10.3389/fnins.2021.781786
Published: 2021
Container: Frontiers in neuroscience
Publisher: Not recorded
Open access: yes

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Cite this work

BibTeX

@article{allodium:10.3389/fnins.2021.781786,
  title = {Hardware-Efficient Stochastic Binary CNN Architectures for Near-Sensor Computing.},
  author = {Parmar V and Penkovsky B and Querlioz D and Suri M},
  year = {2021},
  journal = {Frontiers in neuroscience},
  doi = {10.3389/fnins.2021.781786},
  url = {https://doi.org/10.3389/fnins.2021.781786}
}

RIS

TY  - JOUR
TI  - Hardware-Efficient Stochastic Binary CNN Architectures for Near-Sensor Computing.
AU  - Parmar V
AU  - Penkovsky B
AU  - Querlioz D
AU  - Suri M
PY  - 2021
JO  - Frontiers in neuroscience
DO  - 10.3389/fnins.2021.781786
UR  - https://doi.org/10.3389/fnins.2021.781786
ER  -

APA

V, P., B, P., D, Q., & M, S. (2021). Hardware-Efficient Stochastic Binary CNN Architectures for Near-Sensor Computing.. Frontiers in neuroscience. https://doi.org/10.3389/fnins.2021.781786

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pubmed · retrieved 2026-09-25T19:40:19.597Z