Optimization of Additive and Current Conditions for Void-Free Filled Through-Silicon Via

Se-Hee Shin, Tea-Yoo Kim, Jong-Hwan Park, Su-Jeong Suh

Open source

DOI: 10.3390/app8112135
Published: 11
Container: Applied Sciences
Publisher: Not recorded
Open access: yes

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Cite this work

BibTeX

@article{allodium:10.3390/app8112135,
  title = {Optimization of Additive and Current Conditions for Void-Free Filled Through-Silicon Via},
  author = {Se-Hee Shin and Tea-Yoo Kim and Jong-Hwan Park and Su-Jeong Suh},
  year = {2018},
  journal = {Applied Sciences},
  doi = {10.3390/app8112135},
  url = {https://doi.org/10.3390/app8112135}
}

RIS

TY  - JOUR
TI  - Optimization of Additive and Current Conditions for Void-Free Filled Through-Silicon Via
AU  - Se-Hee Shin
AU  - Tea-Yoo Kim
AU  - Jong-Hwan Park
AU  - Su-Jeong Suh
PY  - 2018
JO  - Applied Sciences
DO  - 10.3390/app8112135
UR  - https://doi.org/10.3390/app8112135
ER  -

APA

Shin, S., Kim, T., Park, J., & Suh, S. (2018). Optimization of Additive and Current Conditions for Void-Free Filled Through-Silicon Via. Applied Sciences. https://doi.org/10.3390/app8112135

Source records

doaj · retrieved 2026-09-26T00:50:08.278Z