Design and Performance Analysis of Double-Gate TFETs Using High-k Dielectrics and Silicon Thickness Scaling for Low-Power Applications
- DOI
- 10.3390/engproc2026124038
- Published
- 02
- Container
- Engineering Proceedings
- Publisher
- Not recorded
- Open access
- yes
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BibTeX
@article{allodium:10.3390/engproc2026124038,
title = {Design and Performance Analysis of Double-Gate TFETs Using High-k Dielectrics and Silicon Thickness Scaling for Low-Power Applications},
author = {Pallabi Pahari and Sushanta Kumar Mohapatra and Jitendra Kumar Das and Om Prakash Acharya},
year = {2026},
journal = {Engineering Proceedings},
doi = {10.3390/engproc2026124038},
url = {https://doi.org/10.3390/engproc2026124038}
}RIS
TY - JOUR TI - Design and Performance Analysis of Double-Gate TFETs Using High-k Dielectrics and Silicon Thickness Scaling for Low-Power Applications AU - Pallabi Pahari AU - Sushanta Kumar Mohapatra AU - Jitendra Kumar Das AU - Om Prakash Acharya PY - 2026 JO - Engineering Proceedings DO - 10.3390/engproc2026124038 UR - https://doi.org/10.3390/engproc2026124038 ER -
APA
Pahari, P., Mohapatra, S. K., Das, J. K., & Acharya, O. P. (2026). Design and Performance Analysis of Double-Gate TFETs Using High-k Dielectrics and Silicon Thickness Scaling for Low-Power Applications. Engineering Proceedings. https://doi.org/10.3390/engproc2026124038
Source records
- doaj · retrieved 2026-09-26T09:11:50.093Z