The Design of a Dynamic Configurable Packet Parser Based on FPGA.
- DOI
- 10.3390/mi14081560
- Published
- 2023 Aug 5
- Container
- Micromachines
- Publisher
- Not recorded
- Open access
- yes
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limited evidence Score 45/100 under policy 1.0.0. This is a metadata assessment, not a judgment of the paper's conclusions.
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Cite this work
BibTeX
@article{allodium:10.3390/mi14081560,
title = {The Design of a Dynamic Configurable Packet Parser Based on FPGA.},
author = {Sun Y and Guo Z},
year = {2023},
journal = {Micromachines},
doi = {10.3390/mi14081560},
url = {https://doi.org/10.3390/mi14081560}
}RIS
TY - JOUR TI - The Design of a Dynamic Configurable Packet Parser Based on FPGA. AU - Sun Y AU - Guo Z PY - 2023 JO - Micromachines DO - 10.3390/mi14081560 UR - https://doi.org/10.3390/mi14081560 ER -
APA
Y, S., & Z, G. (2023). The Design of a Dynamic Configurable Packet Parser Based on FPGA.. Micromachines. https://doi.org/10.3390/mi14081560
Source records
- pubmed · retrieved 2026-11-10T08:14:17.935Z