Hardware–Algorithm Co-Optimization of Weight-Update Protocols in Oxide-Based Synaptic Transistor Arrays for Neuromorphic Systems

Yixin Cao, Jingsong Xia, Xiangyi Ding, Xin Wang, Jin Liu, Canhua Xu

Open source

DOI
10.3390/mi17091049
Published
2026-09-02
Container
Micromachines
Publisher
MDPI AG
Open access
unknown

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BibTeX

@article{allodium:10.3390/mi17091049,
  title = {Hardware–Algorithm Co-Optimization of Weight-Update Protocols in Oxide-Based Synaptic Transistor Arrays for Neuromorphic Systems},
  author = {Yixin Cao and Jingsong Xia and Xiangyi Ding and Xin Wang and Jin Liu and Canhua Xu},
  year = {2026},
  journal = {Micromachines},
  doi = {10.3390/mi17091049},
  url = {https://doi.org/10.3390/mi17091049}
}

RIS

TY  - JOUR
TI  - Hardware–Algorithm Co-Optimization of Weight-Update Protocols in Oxide-Based Synaptic Transistor Arrays for Neuromorphic Systems
AU  - Yixin Cao
AU  - Jingsong Xia
AU  - Xiangyi Ding
AU  - Xin Wang
AU  - Jin Liu
AU  - Canhua Xu
PY  - 2026
JO  - Micromachines
DO  - 10.3390/mi17091049
UR  - https://doi.org/10.3390/mi17091049
ER  - 

APA

Cao, Y., Xia, J., Ding, X., Wang, X., Liu, J., & Xu, C. (2026). Hardware–Algorithm Co-Optimization of Weight-Update Protocols in Oxide-Based Synaptic Transistor Arrays for Neuromorphic Systems. Micromachines. https://doi.org/10.3390/mi17091049

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